Search - pci IP

[Other resource] ml505_pcie_x1_plus

Description: Xilinx 公司PCI Express IP核应用参考设计。通过这个样例，用户可以掌握PCI Express应用设计的一般方法，了解PCI Express的工作原理。
Platform: | Size: 1798028 | Author: daniel J | Hits:

[Embeded-SCM Develop] cast_pci-m32_usg-3v09n00s00

Description: Cast IP PCI- Master32 User Manual
Platform: | Size: 1456308 | Author: 李芊 | Hits:

[Other resource] pci_arbi_quicklogic

Description: pci总线仲裁ip，对学习者有很高的参考价值。
Platform: | Size: 3480 | Author: 王廷龙 | Hits:

[Other resource] hgb_pci_host

Description: 内有一PCI 主和PCI从，PCI TARGET 都是公开代码的，是工程文件，有仿真工程，使用说明。觉得好的就推荐一下。本PCI_HOST目前支持： 1、对目标PCI_T进行配置； 2、对目标进行单周期读写； 3、可以工作在33MHZ和66MHZ 4、支持目标跟不上时插入最长10时钟的等待。 ALTERA的PCI竟然收费的！！！软件里面调试仿真了半天，终于调通了，到了下载就突然弹出窗口说包含了有限制的IP CORE，是限制使用的
Platform: | Size: 2713327 | Author: 黄光边 | Hits:

[Program doc] AX88180 文档

Description:

AX88180在嵌入式系统中的应用

1 概述

AX88180是台湾ASIX公司推出的一款高性能低成本的Non-PCI千兆以太网控制器,符合IEEE802.3／IEEE 802.3u／IEEE 802.3ab协议,适用于多种需要高速接入网络的嵌入式系统,在串流媒体、多媒体网络、高频宽传输等领域有广泛的应用,如影音内容分发、IP机顶盒、数字录放机、DVD录放机、高清晰电视、数字媒体转接器、家用网关以及IP电视等

Platform: | Size: 183296 | Author: guotong1984 | Hits:

[Driver Develop] drvsrc

Description: PCI9054芯片的DriverStudio源码，相比DDK写的WDM源码更为简单。本源码具有实用价值。-PCI9054 the DriverStudio source, Compared DDK wrote WDM source more simple. The source has practical value.
Platform: | Size: 526336 | Author: 王阿毛 | Hits:

[Embeded-SCM Develop] PCI_IP

Description: PIC 的ip 有用的着的拿去看看吧对于开发pci总线会有很大帮助的-PIC
Platform: | Size: 961536 | Author: yas | Hits:

[VOIP program] IPDemo

Description: 三汇语音卡，ip电话可适用于 SHT-8A/PCI等型号语音卡-Sanhui voice card, ip phone SHT-8A/PCI such models could be applied to voice card
Platform: | Size: 3957760 | Author: jia | Hits:

[Linux-Unix] DW4002DriverSourceCodeforLinuxTV

Description: linux下DVB/IP驱动原代码 DVBWorld 公司产品 www.worlddvb.com-DVBWorld Company products DVB PCI 4002 card driver source code for Linux www.worlddvb.com
Platform: | Size: 424960 | Author: peter_chen | Hits:

[SCM] Ne2000

Description: 为pci接口的RTL8029AS网卡的单片机程序，包括TCP/IP，ARP，发送接收等程序-Interfaces for the pci card microcontroller RTL8029AS procedures, including TCP/IP, ARP, send to receive such procedures as
Platform: | Size: 17408 | Author: 李强 | Hits:

[VOIP program] pcm

Description: The board is opened with FRAMERS (E1), even though this example * does not have PSTN Users, only IP Users. * * The board is opened and controlled via the PCI interface. * * Channels 0, 1 are opened (Trunk 0, BChannels 1, 2) and * activated through RTP. RTP packets are sent by the second * channel and received by the first channel (using the internal * IP-loopback option, or using a loopback connector on the IPM-260 * board s NI connector). -The board is opened with FRAMERS (E1), even though this example * does not have PSTN Users, only IP Users. * * The board is opened and controlled via the PCI interface. * * Channels 0, 1 are opened (Trunk 0, BChannels 1, 2) and * activated through RTP. RTP packets are sent by the second * channel and received by the first channel (using the internal * IP-loopback option, or using a loopback connector on the IPM-260 * board s NI connector).
Platform: | Size: 8192 | Author: jefferychang | Hits:

[Software Engineering] ALTERA_PCI

Description: 关于ALTERA的PCI问答集Q1 What is PCI? What are the typical applications of a PCI bus? Q2 Who governs the PCI Specification? Q3 What level of participation does Altera have in developing PCI standards? Q4 What does the designer need to know about PCI to design with our IP core? -Q1 What is PCI? What are the typical applications of a PCI bus? Q2 Who governs the PCI Specification? Q3 What level of participation does Altera have in developing PCI standards? Q4 What does the designer need to know about PCI to design with our IP core?
Platform: | Size: 9216 | Author: bise | Hits:

[VOIP program] IPGateway

Description: 专业的IP语音网关，使用VC++6.0编程，硬件采用SYNWAY板卡-IPGateway of Synway PCI card VC++6.0 sourse code
Platform: | Size: 3324928 | Author: linuxin | Hits:

[VHDL-FPGA-Verilog] quartus_IPcore

Description: 这15个Quartus的ip核里面有AVR，I2C，sdram，arm，usb，PCI等ipcoure，相信用过ipcore的人都知道这个的重要性，尤其是在NIOS嵌入硬件以提高速度的时候，这些事非常有用的。毕竟这些事人家封装起来的，肯定比自己去编好吧，献给用Quartus的好盆友，希望对你们有用。-free ipcoure
Platform: | Size: 4793344 | Author: 林铭团 | Hits:

[VHDL-FPGA-Verilog] pci_to_wb_latest[1].tar

Description: 该ip核实现了容量为16MB的、双字、可寻址存储镜像与wishbone总线的连接-This core implements a 16 MB DWord-addressable memory image in the Wishbone bus (so WB width is 32 bit). Its functionality is reduced to the minimum which is required by the PCI specification (and I m really trying to stick exactly to the specs).
Platform: | Size: 7168 | Author: hxr | Hits:

[Software Engineering] pci_32_ug262

Description: Xilinx公司PCI Logic IP的用户手册，采用其设计PCI具有很好的参考价值。-The Xilinx PCI Logic IP, user manual, its design PCI has good reference value.
Platform: | Size: 1403904 | Author: ada | Hits:

[Program doc] PCI_E_protocol_transaction

Description: pcie作为一种新型的数据总线，有取代pci的趋势。采用FPGA实现pcie是一个很好的研究途径。在使用xilinxFPGA的时候，ip核已经封装了物理和数据链路层协议，我们只需要完成事务层协议的解析，就可以设计高速的pcie总线。-PCIe data bus as a novel, a replace PCI trend. FPGA implementation pcie is a good way to research. In use xilinxFPGA time, ip nuclear package has the physical and data link layer protocol, we only need to complete the transaction layer protocol parsing, you can design a high-speed pcie bus.
Platform: | Size: 1126400 | Author: wang fangwen | Hits:

[VHDL-FPGA-Verilog] MYPCI

Description: PCI VHDL程序，根据PCI通信协议编写的，，，没有用IP核，。。。本人接触PCI不久，次代码可能会存在些问题，请各位高手指点指点，小弟不尽感激-PCI VHDL procedures, according to the PCI communication protocols written, without using IP cores. . . I contact PCI soon, there may be some minor code issues, please master guiding instructions, brother endless gratitude. .
Platform: | Size: 1152000 | Author: 周健 | Hits:

[VHDL-FPGA-Verilog] altpcie_demo

Description: win7-64 altera pci express hard ip demo测试程序。-win7-64 altera pci express hard ip demo test program
Platform: | Size: 2289664 | Author: 覃灵 | Hits:

[Software Engineering] product_overview00

Description: esignWare是SoC/ASIC设计者最钟爱的设计IP库和验证IP库。它包括一个独立于工艺的、经验证的、可综合的虚拟微架构的元件集合，包括逻辑、算术、存储和专用元件系列，超过140个模块。DesignWare和 Design Compiler的结合可以极大地改进综合的结果，并缩短设计周期。Synopsys在DesignWare中还融合了更复杂的商业IP（无需额外付费）目前已有：8051微控制器、PCI、PCI－X、USB2.0、MemoryBIST、AMBA SoC结构仿真、AMBA总线控制器等IP模块。-esignWare is SoC/ASIC designers favorite library design IP and verification IP library. It includes a process-independent, proven, and can be integrated set of virtual micro-architecture components, including logic, arithmetic, storage, and special elements series, more than 140 modules. Design Compiler and DesignWare combination can greatly improve the results of a comprehensive and shorten the design cycle. Synopsys DesignWare also blend in a more complex business IP (no extra charge) Currently there are: 8051 micro-controller, PCI, PCI-X, USB2.0, MemoryBIST, AMBA SoC structural simulation, AMBA bus controller IP modules such as
Platform: | Size: 420864 | Author: 宝龙富乐 | Hits:

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